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FEATURES 4 Complete 12-Bit D/A Functions Double-Buffered Latches Simultaneous Update of All DACs Possible 5 V Output Range High Stability Bandgap Reference Monolithic BiMOS Construction Guaranteed Monotonic over Temperature 3/4 LSB Linearity Guaranteed over Temperature 4 s max Settling Time to 0.01% Operates with 12 V Supplies Low Power: 720 mW max Including Reference TTL/5 V CMOS Compatible Logic Inputs 8-Bit Microprocessor Interface 24-Pin PDIP or 28-Lead PLCC Package
V REFOUT +5V 2.22k VOLTAGE REFERENCE INPUT LATCHES 8 + 4-BIT LATCHES D7 D6 D5 D4 D3 D2 D1 D0 TTL INPUTS 8-BIT BUS 8 + 4-BIT LATCHES 12-BIT LATCH DAC LATCHES 12-BIT LATCH V REFIN
Quad 12-Bit D/A Converter AD75004
FUNCTIONAL BLOCK DIAGRAM
12-BIT DAC
10k V OUT3 10k V OUT2
12-BIT DAC
8 + 4-BIT LATCHES
12-BIT LATCH
12-BIT DAC
10k VOUT1
8 + 4-BIT LATCHES
12-BIT LATCH
12-BIT DAC
10k VOUT0 +12V -12V V DD VSS AGND DGND
PRODUCT DESCRIPTION
CONTROL LOGIC
The AD75004 contains four complete, voltage output, 12-bit digital-to-analog converters, a high stability bandgap reference, and double-buffered input latches on a single chip. The converters use 12 precision high speed bipolar current steering switches and laser-trimmed thin-film resistor networks to provide fast settling time and high accuracy. Microprocessor compatibility is achieved by the on-chip double-buffered latches. The design of the input latches allows direct interface to 8-bit buses. The 12 bits of data from the first rank of latches can then be transferred to the second rank, avoiding generation of spurious analog output values. The latch responds to strobe pulses as short as 50 ns, allowing use with fast microprocessors. The functional completeness and high performance of the AD75004 results from a combination of advanced switch design, the BiMOS II fabrication process, and proven laser trimming technology. BiMOS II is an epitaxial BiCMOS process optimized for analog and converter functions. The AD75004 is trimmed at the wafer level and is specified to 1/2 LSB maximum linearity error at 25C and 3/4 LSB over the full operating temperature range. The on-chip output amplifiers provide an output range of 5 V, with 1 LSB equal to 2.44 mV.
TTL INPUTS
AD75004
CS WR A3 A2 A1 A0
The bandgap reference on the chip has low noise, long term stability and temperature drift characteristics comparable to discrete reference diodes. The absolute value of the reference is laser trimmed to +5.00 V with 0.6% maximum error. Its temperature coefficient is also laser trimmed. Typical full-scale gain TC is 15 ppm/C. With guaranteed monotonicity over the full temperature range, the AD75004 is well suited for wide temperature range performance.
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
AD75004-SPECIFICATIONS (T = +25 C,
A
12.0 V power supplies unless otherwise noted)
Min Typ Max Units
Parameter DIGITAL INPUTS (D0-D7, A0-A3, CS, WR) Logic Levels (TTL Compatible) Input Voltage, Logic "1" Input Voltage, Logic "0" Input Current, VIH = 5.5 V Input Current, VIL = 0.8 V Input Capacitance ACCURACY Resolution Integral Linearity Error Integral Linearity Error, TMIN to TMAX Differential Linearity Error Differential Linearity Error, TMIN to TMAX Gain (Full-Scale) Error1 Gain Error Drift, TMIN to TMAX1 Bipolar Zero Error1 Bipolar Zero Error Drift, TMIN to TMAX1 CHANNEL-TO-CHANNEL MISMATCH Integral Linearity Error Gain Error1 Bipolar Zero Error1 DYNAMIC PERFORMANCE Settling Time to 0.01% of FSR for FSR Change, 2 k || 500 pF Load Slew Rate, 2 k || 500 pF Load Digital Input Crosstalk (Static)2 ANALOG OUTPUTS Full-Scale Range (FSR) Output Current Short Circuit Limit Current VOLTAGE REFERENCE Reference Output Voltage Temperature Coefficient Reference Output Currents3 Reference Input Voltage Reference Input Current @ 5.0 V POWER SUPPLY GAIN SENSITIVITY Gain/VDD, VDD = +10.8 to +13.2 V dc1 Gain/VSS, VSS = -10.8 to -13.2 V dc1 POWER SUPPLY REQUIREMENTS Voltage Range Supply Currents TEMPERATURE RANGE Specification Storage
Symbol
VIH VIL IIH IIL CIN
2.0 0
5.5 0.8 10 10 10 12 1/4 1/2 1/2 3/4 1/2 3/4 Guaranteed Monotonic 2 10 15 30 1 2 3 7 1/2 1 1 1 4 2
V V A A pF Bits LSB LSB LSB LSB ppm/C LSB ppm/C LSB LSB LSB
2 5
4 -50
s V/s dB V mA mA V ppm/C mA V mA ppm of FSR/% ppm of FSR/% V mA C C
VOUT IOUT
5
5 40
VREFOUT VREFIN IREFIN
4.97 3.0 4.5
5.00 15 5.0 5.0
5.03 25 5.5 3.0 25 25 13.2 30 +70 +150
15 15 VDD, VSS IDD, ISS TMIN, TMAX 10.8 12 25
0 -65
NOTES 1 Gain and bipolar zero errors are measured using internal voltage reference and include its errors. 2 Digital crosstalk is defined as the change in any one output's steady state value as a result of any other output being driven from VOUTMIN to VOUTMAX into a 2 k || 500 pF load by means of varying the digital input code. 3 The internal voltage reference is intended to drive on-chip only; buffer it if using it externally. 4 All minimum and maximum specifications are guaranteed, and specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. Specifications subject to change without notice.
-2-
REV. A
AD75004 TIMING CHARACTERISTICS1
(TA = +25 C,
Parameter Address Setup Time Address Hold Time Data Setup Time Data Hold Time Chip Select to Write Setup Time Write to Chip Select Hold Time Write Pulse Width
NOTES 1 Timing measurement reference level is 1.5 V. Specifications subject to change without notice
ADDRESS INPUTS (A0-A3)
12.0 V power supplies unless otherwise noted)
Symbol t1 t2 t3 t4 t5 t6 t7 Min 30 10 10 45 0 0 50 Units ns ns ns ns ns ns ns
TRUTH TABLE
Control and Address Lines CS WR A3 A2 A1 A0 1 X 0 0 0 0 X 1 0 0 0 0 X X 0 0 1 1 X X 0 1 0 1 X X A1* A1* A1* X X X A0* A0* A0* X
Operation No operation No operation 8 LSBs one input latch 4 MSBs one input latch Update one DAC latch Update all 4 DAC latches
NOTE *The A1 and A0 inputs specify the relevant channel.
A1
t2
A0 0 1 0 1
Channel 0 1 2 3
t1
DATA INPUTS (D0-D7)
t3
CHIP SELECT (CS) WRITE (WR)
t4
0 0 1 1
t6
t5 t7
ABSOLUTE MAXIMUM RATINGS*
(TA = +25C unless otherwise noted)
Min VDD to DGND VSS to DGND VDD to VSS VREFIN to AGND Digital Inputs to DGND AGND to DGND Short to AGND on Analog Outputs Power Dissipation Specification Temperature Range Storage Temperature Lead Temperature -0.3 -18 -0.3 -0.3 -0.3 -0.3
Max +18 +0.3 +26.4 VDD VDD +0.3 Indefinite 1.0 +70 +150 +300
Units V V V V V V sec W C C C
Conditions
TA 75C Soldering, 10 seconds
0 -65
*Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD75004 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ORDERING GUIDE
Model AD75004KN AD75004KP
Temperature Range 0C to +70C 0C to +70C
Package Option* N-24A P-28A
*N = Plastic DIP; P = Plastic Leaded Chip Carrier.
REV. A
-3-
AD75004
PIN DESCRIPTIONS
PLCC Pin 1 2 3 5 6 7 9 10 11 13 14 15 16 17 18 19 20 21 22 23 24 26 27 28 4 8 12 25
Plastic DIP Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 - - - -
PIN CONFIGURATIONS 24-Pin Plastic DIP
D7 D6 D5 D4 D3 D2 1 2 3 4 5 6 24 V DD 23 V OUT3
Name D7 D6 D5 D4 D3 D2 D1 D0 CS WR A3 A2 A1 A0 DGND AGND VSS VREFOUT VREFIN VOUT0 VOUT1 VOUT2 VOUT3 VDD NC NC NC NC
Description Data Input Bit 7 Data Input Bit 6 Data Input Bit 5 Data Input Bit 4 Data Input Bit 3 or 11 (MSB) Data Input Bit 2 or 10 Data Input Bit 1 or 9 Data Input Bit 0 (LSB) or 8 Chip Select Input; Active Low Write Input; Active Low Address Input Bit 3 (MSB) Address Input Bit 2 Address Input Bit 1 Address Input Bit 0 (LSB) Digital Ground Analog Ground -12 V Power Supply +5 V Reference Output Reference Input Analog Output 0 Analog Output 1 Analog Output 2 Analog Output 3 +12 V Power Supply No Internal Connection No Internal Connection No Internal Connection No Internal Connection
21 V OUT1 20 V OUT0
AD75004KN
TOP VIEW (Not to Scale)
19 V REFIN 18 V REFOUT 17 V SS 16 AGND 15 DGND 14 A0 13 A1
D1 7 D0 CS 8 9
WR 10 A3 11 A2 12
28-Pin PLCC
VOUT3 V DD NC D5 D6 D7 VOUT2
4
3
2
1
28
27
26
D4 D3 D2 NC D1
5 6 7 8 9
25 NC 24 VOUT1
AD75004KP
TOP VIEW (Not to Scale)
23 VOUT0 22 VREFIN 21 VREFOUT 20 VSS 19 AGND
D0 10
BINARY CODE TABLE
CS 11 12 13 14 15 16 17 18
MSB 0111 0000 0000 1111 1000
1111 0000 0000 1111 0000
LSB 1111 0001 0000 1111 0000
NC = NO CONNECT
(2047/2048) * VREFIN (1/2048) * VREFIN 0V - (1/2048) * VREFIN -VREFIN
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
DGND
NC
A2
A1
WR
A3
A0
Twos Complement Value in DAC Latch
Analog Output Voltage
Plastic DIP (N-24A)
1.290 (32.77) 1.150 (29.21)
24 13
PLCC (P-28A)
0.180 (4.57) 0.165 (4.19) 0.056 (1.42) 0.042 (1.07)
26 25
0.048 (1.21) 0.042 (1.07)
0.55 (13.97) 0.53 (13.47)
1 12
0.048 (1.21) 0.042 (1.07)
0.025 (0.63) 0.015 (0.38) 0.021 (0.53) 0.013 (0.33)
4 5 PIN 1 IDENTIFIER
PIN 1 0.2 (5.08) MAX
0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN
0.606 (15.4) 0.594 (15.09)
0.16 (4.07) 0.14 (3.56)
11 12
TOP VIEW
(PINS DOWN) 19 18
0.050 (1.27) BSC
0.032 (0.81) 0.026 (0.66)
0.430 (10.92) 0.390 (9.91)
0.175 (4.45) 0.12 (3.05)
0.02 (0.508) 0.100 0.015 (0.381) (2.54) BSC
0.065 (1.66) SEATING 0.45 (1.15) PLANE
0.012 (0.305) 0.008 (0.203)
0.020 (0.50) R
0.456 (11.58) SQ 0.450 (11.43) 0.495 (12.57) SQ 0.485 (12.32)
0.040 (1.01) 0.025 (0.64) 0.110 (2.79) 0.085 (2.16)
-4-
REV. A
PRINTED IN U.S.A.
C1389a-5-10/91
22 V OUT2

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